NMOS logic
Implements logic gates and other digital circuits
NMOS or nMOS logic (from N-type metal–oxide–semiconductor) uses n-type (-) MOSFETs (metal–oxide–semiconductor field-effect transistors) to implement logic gates and other digital circuits. NMOS transistors operate by creating an inversion layer in a p-type transistor body.
Nº Q83908 ★
Common · Knowledge
NMOS logic
Implements logic gates and other digital circuits
NMOS or nMOS logic (from N-type metal–oxide–semiconductor) uses n-type (-) MOSFETs (metal–oxide–semiconductor field-effect transistors) to implement logic gates and other digital circuits. NMOS transistors operate by creating an inversion layer in a p-type transistor body.
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From Wikipedia
NMOS or nMOS logic (from N-type metal–oxide–semiconductor) uses n-type (-) MOSFETs (metal–oxide–semiconductor field-effect transistors) to implement logic gates and other digital circuits. NMOS transistors operate by creating an inversion layer in a p-type transistor body. This inversion layer, called the n-channel, can conduct electrons between n-type source and drain terminals. The n-channel is created by applying voltage to the third terminal, called the gate. Like other MOSFETs, nMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active), and velocity saturation. NMOS AND-by-default logic can produce unusual glitches or buggy behavior in NMOS components, such as the 6502 "illegal opcodes" which are absent in CMOS 6502s. In some cases such as Commodore's VIC-II chip, the bugs present in the chip's logic were extensively exploited by programmers for graphics effects. For many years, NMOS circuits were much faster than comparable PMOS and CMOS circuits, which had to use much slower p-channel transistors. It was also easier to manufacture NMOS than CMOS, as the latter has to implement p-channel transistors in special n-wells on the p-substrate, not prone to damage from bus conflicts, and not as vulnerable to electrostatic discharge damage. The major drawback with NMOS (and most other logic families) is that a direct current must flow through a logic gate even when the output is in a steady state (low in the case of NMOS). This means static power dissipation, i.e. power drain even when the circuit is not switching, leading to high power consumption. Another disadvantage of NMOS circuits is their thermal output. Due to the need to keep constant current running through the circuit to hold the transistors' states, NMOS circuits can generate a considerable amount of heat in operation which can reduce the device's reliability. This was especially problematic with the early large...
Text: Wikipédia, CC BY-SA 4.0. · Image: Beatrice Lotesoriere (CC BY-SA 4.0) ·
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